1. Field of the Invention
This invention relates to integrated circuits, and more particularly, to a high aspect ratio contact structure with reduced consumption of silicon in the junction region.
2. Description of the Related Art
A high density integrated circuit typically includes numerous electrical devices and conductors formed on multiple layers of conducting and semiconducting material that are deposited and patterned in sequence onto a substrate surface. An integrated circuit is operable when its individual components are interconnected with an external source and with one another. In particular, designs of more complex circuits often involve electrical interconnections between components on different layers of circuit as well as between devices formed on the same layer. Such electrical interconnections between components are typically established through electrical contacts formed on the individual components. The contacts provide exposed conductive surfaces on each device where electrical connections can be made. For example, electrical contacts are usually made among circuit nodes such as isolated device active regions formed within a single-crystal silicon substrate. However, as the contact dimensions of devices become smaller, the contact resistance and the sheet resistance of the contacts also increase.
To address this problem, refractory metal silicides have been used for local interconnections to provide low resistance electrical contacts between device active regions within the silicon substrate. One common method of forming metal silicides is a self-aligned silicide process, often referred to as silicidation. In this process, a thin layer of refractory metal, such as titanium, is deposited over a dielectric area and through contact openings formed on the dielectric area to contact underlying silicon circuit elements, such as a source and drain active regions formed within a silicon substrate. The structure is then annealed to form a silicide, such as titanium silicide (TiSix), at a high temperature. During annealing, the deposited titanium reacts with the silicon in the substrate to form TiSix inside the contact openings adjacent the active regions. The titanium and silicon react with each other to form a silicide thick enough to provide low sheet resistance. The process is referred to as “self-aligning” because the TiSix is formed only where the metal layer contacts silicon, for example, through the contact openings. As such, titanium that overlies the dielectric areas surrounding the contact openings, along the sidewalls of the openings, and any other non-silicon surfaces remains unreacted.
The conventional silicidation process is not entirely suitable for devices having relatively shallow contact junctions. Shallow junction structures may be damaged when the silicidation reaction consumes a disproportionate amount of silicon from the relatively shallow junction region. To address this problem, a titanium silicide film can be directly deposited on the silicon substrate to reduce silicon consumption in the junction area. The TiSix film can be deposited using low pressure chemical vapor deposition (LPCVD) or chemical vapor deposition (CVD) processes. However, there are numerous disadvantages associated with forming a conventional TiSix film on the substrate. For example, the LPCVD process used typically requires reaction temperatures in excess of 700 C and the conventional CVD process tends to produce a TiSix film with high bulk resistivity.
Moreover, subsequent to forming the TiSix film, a diffusion barrier layer such as titanium nitride (TiN) is typically formed on the contact structure. The TiN layer inhibits subsequently deposited contact metal from diffusing into the insulating layer surrounding the contact structure. Typically, TiN is deposited on the TiSix layer in the contact openings as well as on the unreacted Ti remaining on the dielectric layer and on the sidewalls of the contact openings. Disadvantageously, TiN forms a relatively weak bond with Ti and is likely to peel off from surfaces where TiN has contact with Ti. To address this problem, the Ti deposited on the dielectric layer and on the sidewalls of the contact opening can be removed prior to deposition of TiN. However, the Ti removal process is likely to add to the cost and complexity of the fabrication process.
Furthermore, once the diffusion barrier layer is formed, conductive contact fills such as tungsten can be deposited into the contact openings. The contact fills are typically deposited into the contact openings by physical deposition processes such as sputtering. However, the step coverage provided by sputtering and other physical deposition processes is often inadequate for high aspect ratio contact openings because it can be particularly difficult to physically deposit uniform layers of contact fill into high aspect ratio contact openings.
Hence, from the foregoing, it will be appreciated that there is a need for a method of improving the step coverage of contact fills in high aspect ratio contact structures. There is also a need for a contact structure having improved contact fill adhesion. Furthermore, there is also a need for a method of reducing silicon consumption in shallow junction regions during silicidation process. To this end, there is a particular need for a high aspect ratio contact structure that provides a more uniform step coverage and improved TiN adhesion. There is also a particular need for a method of reducing silicon consumption in shallow junction regions during the formation of the titanium silicide layer.